1. Field of the Invention
The present invention relates to a frequency shift keying (FSK) demodulator circuit and frequency modulation (FM) demodulator circuit, and more particularly, to an FSK demodulator circuit and FM demodulator circuit utilizing a band-pass filter to shift phase.
2. Description of the Prior Art
The tendency of chip integration continues to head towards more logic components and smaller areas. At present, a chip designer lessens external components for lowering cost and reducing the areas of the circuit as far as possible. Hence, an essential technology becomes integrating external components into an internal chip, such as integrating a filter into a chip.
The development of wireless communication changes with each passing day since the 19th century discovery of electromagnetic waves. Regardless if commercial usage or other field, wireless communication is closely linked to human daily use. The audible frequency range of a human ear, from about 20 Hz to 20 kHz, is difficult to transmit by radio. Therefore, transmitters use higher frequencies to transmit wireless waves (called carrier waves) and hide information in the carrier waves. Receivers return information from the carrier waves. By modulating and demodulating signals, signals can be transmitted farther. The drawback of transmitting signals wirelessly is that there is noise interference. Hence, demodulating the original signal correctly becomes an essential technology in wireless communication.
Please refer to FIG. 1 that is a diagram of a frequency modulation (FM) demodulator circuit 10 according to the prior art. The FM demodulator circuit 10 includes a discriminator 12 and a multiplier 14. The discriminator 12 includes a resistor R, a capacitor C, and an inductor L. A first end of the resistor R is coupled to a first end of the capacitor C, a first end of the inductor L, and a first input end 142 of the multiplier 14. A second end of the resistor R is coupled to a second end of the capacitor C, a second end of the inductor L, and ground. A frequency modulated signal FM is coupled to a second input end 144 of the multiplier 14 and an input end 122 of the discriminator 12. The discriminator 12 includes a center frequency fc which equals 1/(2*pi*sqrt(L*C)). When the frequency of the frequency modulated signal FM is exactly fc, a phase difference between the frequency modulated signal FM and a signal outputted from the discriminator 12 is exactly 90 degrees. When the frequency of the frequency modulated signal FM is fc+fsig, the phase difference between the frequency modulated signal FM and the signal outputted from the discriminator 12 is exactly (90+k*fsig) degrees. When the frequency of the frequency modulated signal FM is fc−fsig, the phase difference between the frequency modulated signal FM and the signal outputted from the discriminator 12 is exactly (90−k*fsig) degrees. Inputting the frequency modulated signal FM and the signal outputted from the discriminator 12 into the multiplier 14 and multiplying can detect whether the phase difference between the frequency modulated signal FM and the signal outputted from the discriminator 12 is greater or less than 90 degrees. This derives the value and the polarity (positive or negative) of the frequency fsig and derives the frequency of the frequency modulated signal FM (fc+fsig or fc−fsig) further. The derived frequency is utilized for returning the information of the frequency modulated signal FM, and then completing the demodulation of the frequency modulation (FM).
Please refer to FIG. 2 that is a diagram of a frequency shift keying (FSK) demodulator circuit 20 according to the prior art. The FSK demodulator circuit 20 includes a discriminator 12, a multiplier 14, and an analog-to-digital converter 26. The analog-to-digital converter 26 is coupled to the multiplier 14 for converting a result outputted from the multiplier 14 into digital data. The discriminator 12 includes a resistor R, a capacitor C, and an inductor L. A first end of the resistor R is coupled to a first end of the capacitor C, a first end of the inductor L, and a first input end 142 of the multiplier 14. A second end of the resistor R is coupled to a second end of the capacitor C, a second end of the inductor L, and ground. A frequency shift keying signal FSK is coupled to a second input end 144 of the multiplier 14 and an input end 122 of the discriminator 12. The discriminator 12 includes a center frequency fc which equals 1/(2*pi*sqrt(L*C)). When the frequency of the frequency shift keying signal FSK is exactly fc, a phase difference between the frequency shift keying signal FSK and a signal outputted from the discriminator 12 is exactly 90 degrees. When the frequency of the frequency shift keying signal FSK is fc+fsig, the phase difference between the frequency shift keying signal FSK and the signal outputted from the discriminator 12 is exactly (90+k*fsig) degrees. When the frequency of the frequency shift keying signal FSK is fc−fsig, the phase difference between the frequency shift keying signal FSK and the signal outputted from the discriminator 12 is exactly (90−k*fsig) degrees. Inputting the frequency shift keying signal FSK and the signal outputted from the discriminator 12 into the multiplier 14 and multiplying can detect whether the phase difference between the frequency shift keying signal FSK and the signal outputted from the discriminator 12 is greater or less than 90 degrees. This derives the value and the polarity (positive or negative) of the frequency fsig and derives the frequency of the frequency shift keying signal FSK (fc+fsig or fc−fsig) further. The derived frequency is utilized for returning the information of the frequency shift keying signal FSK, and then completing the demodulation of the frequency shift keying (FSK).
Due to the center frequency fc of the discriminator 12 being equal to 1/(2*pi*sqrt(L*C)), when the center frequency fc is very low, a large capacitance and inductance are required to reach it. A large internal capacitor and inductor are unable to be used on a chip. Therefore, an external capacitor and inductor are needed. The drawbacks of the method are that it wastes large printed circuit board (PCB) area and raises the cost.